AD4080 - 20-Bit, 40 MSPS, Differential SAR ADC

AD4080 -  20-Bit, 40 MSPS, Differential SAR ADC

 

Analog Devices

 

Description

The AD4080 is a high-speed, low noise, low distortion, 20-bit, Easy Drive, successive approximation register (SAR) analog-to-digital converter (ADC). Maintaining high performance (signal-to-noise and distortion (SINAD) ratio > 90 dBFS) at signal frequencies in excess of 1 MHz enables the AD4080 to service a wide variety of precision, wide bandwidth data acquisition applications.

Simplification of the input anti-alias filter design can be accomplished by applying oversampling along with the integrated digital filtering and decimation to reduce noise and lower the output data rate for applications that do not require the lowest latency of the AD4080.

The AD4080 Easy Drive features reduce both signal chain complexity and power consumption while enabling greater channel density and flexibility in companion component selection. The product input structure was designed to minimize any input dependent signal currents, therefore reducing any converter-induced settling artifacts. The continuous acquisition architecture allows settling across the entire conversion cycle, easing ADC driver settling and bandwidth requirements as compared to other high-speed data converters.

The AD4080 includes several elements that simplify data converter integration: a low drift reference buffer, low dropout (LDO) regulators to generate ADC core and digital interface supply rails, and a 16K result data first-in first out (FIFO) that can greatly reduce the load on the digital host. Additionally, critical supply and reference decoupling capacitors are integrated in the package to ensure optimum performance, simplify printed circuit board (PCB) layout, and reduce the overall solution footprint.

 

AD4080은 고속, 저잡음, 저왜곡 20비트 Easy Drive 연속 근사 레지스터(SAR) 아날로그-디지털 컨버터(ADC)입니다. 1MHz 이상의 신호 주파수에서 신호대잡음 및 왜곡비(SINAD) > 90dBFS의 높은 성능을 유지함으로써 AD4080은 다양한 정밀, 광대역 데이터 수집 애플리케이션을 지원할 수 있습니다.

AD4080은 오버샘플링을 적용하여 입력 안티앨리어스 필터 설계를 간소화할 수 있으며, 통합된 디지털 필터링 및 디시메이션을 통해 잡음을 줄이고, 가장 낮은 지연 시간이 필요하지 않은 애플리케이션에 대해 출력 데이터 속도를 낮출 수 있습니다.

AD4080의 Easy Drive 기능은 신호 체인 복잡성을 줄이고 전력 소비를 절감하면서 동반되는 구성 요소 선택에서 더 큰 채널 밀도와 유연성을 제공합니다. 제품의 입력 구조는 입력 종속 신호 전류를 최소화하도록 설계되어 변환기에 의해 유발되는 안정화 아티팩트를 줄여줍니다. 연속 획득 아키텍처는 변환 주기 전체에 걸쳐 안정화를 허용하여, 다른 고속 데이터 컨버터와 비교했을 때 ADC 드라이버의 안정화 및 대역폭 요구 사항을 완화합니다.

AD4080에는 데이터 컨버터 통합을 단순화하는 여러 요소가 포함되어 있습니다. 저 드리프트 기준 버퍼, ADC 코어 및 디지털 인터페이스 공급 레일을 생성하는 저드롭아웃(LDO) 레귤레이터, 그리고 디지털 호스트의 부하를 크게 줄일 수 있는 16K 결과 데이터 FIFO(선입선출)가 있습니다. 또한, 중요한 전원 및 기준 디커플링 커패시터가 패키지에 통합되어 최적의 성능을 보장하고 PCB(인쇄 회로 기판) 레이아웃을 단순화하며, 전체 솔루션 풋프린트를 줄입니다.

 

accomplished : 성취된, 완성된, 기성의

 

 

FEATURES
 ► High performance
     ► Throughput: 40 MSPS, 46.25 ns conversion latency
     ► INL: ±4 ppm (typical), ±8 ppm (maximum)
     ► SNR/THD
         ► 93.6 dB (typical)/−110 dB (typical) at fIN = 1 kHz
         ► 93.5 dB (typical)/−104 dB (typical) at fIN = 1 MHz
     ► Noise spectral density: −167.6 dBFS/Hz
     ► 20-bit resolution, no missing codes
 ► Low power
     ► 79.3 mW typical at 40 MSPS with −0.5 dBFS sine-wave input
 ► Easy Drive, fully differential Input
     ► 6 V p-p differential input range
     ► Continuous signal acquisition
     ► Linearized, 5 μA/MSPS input current
 ► Integrated, low-drift reference buffer and decoupling
 ► Integrated VCM generation
 ► Digital features and data interface
     ► Conversion result FIFO, 16K sample depth
     ► Digital averaging filter with up to 210 decimation
 ► SPI configuration
 ► Configurable data interface
     ► Single lane, DDR, serial LVDS, 800 MBPS per lane
     ► Dual lane, DDR, serial LVDS, 400 MBPS per lane
     ► Single/quad lane SPI data interface
 ► Package
     ► 49-ball, 5 mm x 5 mm CSP_BGA, 0.65 mm pitch
     ► Integrated supply decoupling capacitors
 ► Operating temperature range: −40°C to +85°C

 

 

 

 

 

 

 

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